EEPROM Addressing

[UniquePete]

In the process of moving a lot of my common code to libraries, I had occasion to consider the issue of I²C EEPROM addressing, in particular the fact that smaller EEPROMs (16K and smaller) use only a single byte address, while larger EEPROMs (32K and above) require the use of a two-byte address.

A way to automatically determine the required addressing mode for an EEPROM of unknown capacity is provided in this Microchip Application Note. The algorithm as described did not work in the present environment, requiring a minor amendment to accommodate actual observed behaviour. The refined method is described under the EepromHandler software page but is reproduced here for ease of access.

The process for determining the required addressing mechanism is as follows:

We send a two-byte address, 00 00, followed by a single data byte, 01, to be written to that address, then attempt to read the value back using a single-byte address of 00. If the EEPROM under test requires (‘standard’) single-byte addressing, we will read a value of 00 at address 00. If (‘smart’) address is required, the original write request will have set the value of the byte at this location to 01.

The logic of this test is as follows:

• Transmitted write request:

  –start– 00 00 01 –stop–

• If a (‘standard’) single-byte address was required, the write request will have been interpreted as a single address byte, 00, followed by two data bytes, 00 and 01, which will be stored starting, as requested, at location 00.

  Result:

  Location	00	01
  Value	00	01

• If a (‘smart’) two-byte address was required, the write request will produce its intended outcome, with two address bytes, 00 00, identifying the location, followed by a single data byte, 01.

  Result:

  Location	00	01
  Value	01	unknown

When we try to read the stored value using a single address byte, 00, the request will be interpreted as follows:

• Transmitted read request:

  –start– 00 –stop–

• If a (‘standard’) single-byte address is required, the [single byte] address provided will be valid and the content of EEPROM location 00 will be returned as 00 (see above).
• If a (‘smart’) two-byte address is required, the address in our read request, which contains only a single address byte, will be incomplete, and the result dependent on how the system responds to this condition. The Application Note suggests that, for reasons discussed therein, the request would always return the value at location 00, which would be 01.My own observation has been that, in this situation, the EEPROM address register will contain the address following the last valid access request, presumably having been set up in the expectation that the next operation would be on the next memory location. In the present case, the value of that byte, the byte at location 01, is unknown.

In our write process then, we need to ensure that we always write some known value into location 01 of the EERPOM, as, if we are careful with our sequence of instructions, this will be the value returned by a read request with an incomplete address specification. Accordingly, one small modification has been made to the Microchip algorithm. Instead of attempting to write just one byte to a known location, we write two, as follows:

• Send two write requests:

  –start– 00 01 01 –stop–

  –start– 00 00 01 –stop–

• If a (‘standard’) single-byte address was required, each write request will have been interpreted as a single address byte followed by two data bytes. After the first write, we will have the following:
  

  Location	00	01
  Value	01	01

  Then, after the second:

  Location	00	01
  Value	00	01

• If a (‘smart’) two-byte address was required, these write requests will write the value 01 to each of the addresses specified. After the first write, we will have to following:
  

  Location	00	01
  Value	unknown	01

  Then, after the second:

  Location	00	01
  Value	01	01

  The important thing about writing the two locations in this way is that the EERPOM address register is left containing the location following the last write. If we had simply written two bytes in sequence, the register would be left pointing to the third byte, the content of which would be unknown, not the second, where we have previously stored a known value, 01.

This process will have no impact on the result if ‘standard’ single-byte addressing is required—the subsequent read request will return the value stored at location 00, which will be 00.

If, however, ‘smart’ addressing has been required, both EEPROM locations 00 and 01 will contain the value 01, which will thus be the value returned whether the incomplete address provided in the ‘standard’ single-byte address read returns the value stored at location 00, as suggested by the Microchip Application Note, or the location following that of the last successful operation, 01, as I have observed.

It is also noted that this process overwrites the original contents of the first two bytes of the EERPOM. In the present implementation, the relevant EepromHandler class method saves the original EEPROM contents and restores them on completion of the test, so no data is lost in the process—we save using both addressing methods, noting that only one will produce a valid copy, but which one is valid will be known on completion of the test and it is this copy that is used in the restoration.

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